Solid-state storage devices such as solid-state disks (SSDs) have been increasingly employed in laptop and tablet computers, as well as computerized devices such as smartphones. A typical SSD includes a non-volatile storage medium such as NAND or NOR flash memory for storing digital information in an array of memory cells. Because the digital information is stored in the non-volatile NAND/NOR flash memory of the SSD, it can persist in the computer system/computerized device even if power is lost to the SSD. After power is restored to the SSD, a host computer within the system/device can access the digital information from the SSD.
Due in no small part to the widespread use of SSDs in laptop and tablet computers as well as smartphones, techniques for reducing power consumption in SSDs have gained increased attention in recent years. One goal of such techniques is to reduce idle power levels in the SSDs. To achieve such reduced idle power levels, some conventional computer systems, computerized devices, and/or SSD subsystems have been configured to remove power from all unneeded components of an SSD as the SSD enters a reduced power state, such as the known “Partial”, “Slumber”, or “DevSleep” reduced power state. To maintain low resume latency as the SSD exits its reduced power state, some conventional computer systems, computerized devices, and/or SSD subsystems have been further configured to store context information for the SSD (e.g., information pertaining to media encryption keys used for storage devices that perform encryption, etc.) in memory that has a power source distinct from that of the SSD. For example, some conventional computer systems, computerized devices, and/or SSD subsystems have been configured to store such context information for an SSD in volatile static random access memory (SRAM) within a storage controller of the SSD, or in an off-chip SRAM or dynamic random access memory (DRAM).